: For high-volume consumer electronics. Family Comparison Feature Primary Use Legacy general-purpose PHY Standard modern 10/100 PHY Energy Efficient (EEE) version Regulator Built-in 1.8V for core Built-in 1.2V for core Built-in 1.2V for core Standout Features Fiber support (FTL model) Smallest 24-pin package option Wake-on-LAN (WoL) support
The Reduced Media Independent Interface reduces pin counts between the MAC (Microcontroller/Processor) and the PHY. It operates using a synchronous 50 MHz reference clock. Pin Number (32-QFN) Description Transmit Data Bit 1 2 Transmit Data Bit 0 3 Transmit Enable from MAC 7 Receive Data Bit 1 8 Receive Data Bit 0 10 RX_ER / ISO Receive Error / Isolation Config 11 Carrier Sense / Receive Data Valid 14 Input/Output 50 MHz Synchronous Reference Clock 2. MII Mode (KSZ8081MNX Variant) ksz80 ob s4lv02 datasheet
Clock signal driven by the MAC (up to 2.5 MHz standard). : For high-volume consumer electronics